Posts Tagged ‘CPLD’

Intro to Programmable Logic & FPGAs – April 27

fpga-architecture

I’ve been bugged to death lately about doing another FPGA intro class…and after a full year, it’s finally here.  We’ll be going over some theory & concepts first before we hit the real stuff.  Familiarity with digital logic circuits is highly recommended, but you will still learn something regardless.  A basic overview of what will be covered:

  1. Combinational Logic – Basic Logic Gates
  2. Sequential Logic – Flips Flops
  3. CPLD – Complex Programmable Logic Device
  4. FPGA – Field Programmable Gate Array
  5. Nintendo DS ReView – An Example of What FPGAs Can Do
  6. Xilinx ISE & Verilog – Synthesizing the First Project
  7. Using Clocks – Blink that LED!
  8. State Machines – Alternate between blinking different LEDs!
  9. Video Example – Making an 8-bit VGA controller

I’ll be using the Elbert FPGA development board for most of the examples we’ll be doing.  Having the board is not required to attend.  I will bring a disc with the software tools in case anyone would like to install them.  We will be using Verilog as the HDL (hardware description language) in this class, since that is what I am familiar with.

The Details:

  • Who: Anyone (Open to the Public)
  • When: Sunday, April 27th – 2:00pm to 4:00pm….but we can chill until 5:00pm.
  • Where: 3519 N. Elston – 2nd Floor in the Electronics Lab
  • Cost: FREE

 

19

04 2014

NERP – FPGAOK

FPGA1

FPGA2

I’ve heard a lot of positive feedback from the NERP FPGA workshop we did a couple weeks back.  There were a few people who asked me to post the Verilog code that went along with the two demos we did.  I added comments to the Verilog files in an attempt to clear up a lot of the stuff we cruised through to avoid turning this purely into a Verilog class.  The most useful comments will be in the VGA controller module we wrote: vga640x480.v.  Anyway, all the required project files to synthesize the logic we wrote are right here:  NERP_demo.zip

The software we used to build everything is the Xilinx ISE WebPACK 13.4.  You have to register with Xilinx and generate/download a license on their website to use the software.  Just remember that the above project will only work on the Digilent Nexys2-1200 board that I was using.

If you’re interested in grabbing a budget board for messing around with FPGAs or CPLDs, there are a few notable options:

  1. Papilio One
  2. CoolRunner-II
  3. DE0-Nano
  4. Basys2
  5. XuLA-200
  6. BORA

Also, thanks to Drew Fustini for the lovely photos you ‘re seeing above.  Actually, this whole FPGA thing was Drew’s idea.  So, if you were really itching to do some Raspberry Pi that week and walked in to find a bunch of nerds talking about programmable logic gates, then all your blame should be focused towards him.  On the other hand, if you enjoyed this FPGA crash-course you should thank him for that and any subsequent class/workshop he forces me to do.

MORE PHOTOS HERE

12

04 2013