I’ve heard a lot of positive feedback from the NERP FPGA workshop we did a couple weeks back. There were a few people who asked me to post the Verilog code that went along with the two demos we did. I added comments to the Verilog files in an attempt to clear up a lot of the stuff we cruised through to avoid turning this purely into a Verilog class. The most useful comments will be in the VGA controller module we wrote: vga640x480.v. Anyway, all the required project files to synthesize the logic we wrote are right here: NERP_demo.zip
The software we used to build everything is the Xilinx ISE WebPACK 13.4. You have to register with Xilinx and generate/download a license on their website to use the software. Just remember that the above project will only work on the Digilent Nexys2-1200 board that I was using.
If you’re interested in grabbing a budget board for messing around with FPGAs or CPLDs, there are a few notable options:
Also, thanks to Drew Fustini for the lovely photos you ‘re seeing above. Actually, this whole FPGA thing was Drew’s idea. So, if you were really itching to do some Raspberry Pi that week and walked in to find a bunch of nerds talking about programmable logic gates, then all your blame should be focused towards him. On the other hand, if you enjoyed this FPGA crash-course you should thank him for that and any subsequent class/workshop he forces me to do.